2026-10-31T19:57:06Z https://nostr.now Brian Swetland https://nostr.now/npub1pcxszqyeekhg5uy4qrjx4jk65sq223xukk3azt8h4lhg724e7n3qg5rjk8 https://assets.chaos.social/accounts/avatars/108/195/841/919/578/029/original/b9457c2da03bee91.jpg https://assets.chaos.social/accounts/avatars/108/195/841/919/578/029/original/b9457c2da03bee91.jpg https://nostr.now/nevent1qqsgg8e0hq26064kytq53qxx8a76p2e6jqnrvn8lzw0fz34ret22pxczyq8q6qgqn8x6aznsj5qwg6k2m2jqpf2ymj6685fv77h7are2h86wycl5tcv In reply to <a href='/nevent1qqsrxgr2juythp74ag973ezk8z8r9u9s2xnvupx6n6gwvjthh6jgy2c7j2yv3'>nevent1q…2yv3</a><br/>_________________________<br/><br/>My read on it is that VERA was designed to handle a 1MHz 6502 bus interface by mostly leveraging the fact that it runs at 25MHz internally rather than doing more extensive CDC handling. I suspect as the external bus clock gets faster, things just generally get iffier. 2024-08-04T23:38:08Z