nprofile1qyt8wumn8ghj7un9d3shjtnyd968gmewwp6kytcqyqpjn4vqgkchzj5qlpg7c0h2p8404a6memc63zcwdhyanvmx3pdauyvsyqt (nprofile…syqt) nprofile1qyt8wumn8ghj7un9d3shjtnyd968gmewwp6kytcqyqd6eyshynvcg7k3spwnzz7emcx82vq59hrjwevtgsc9x7yn7wx72gddpjt (nprofile…dpjt) this was tweaked at some point during the development of M-profile, and older M parts actually have a bit for disabling the 8-byte alignment. I assume that ldrd/strd is the motivation, but I don't know that it's documented anywhere.
ISRs will automatically push an additional word if the SP is 4-byte-aligned on entry, and set a status bit to record that it happened so the hardware can skip it on unstacking. That part is done for you.
But particularly in your crt0 (or any asm that calls C code), if you don't maintain the alignment, things will eventually break in weird ways due to some code assuming stack alignment and not finding it. It generally won't crash.
cliffle
npub19z…spj90
2025-11-23 15:39:27 UTC
in reply to nevent1q…cz86
Author Public Key
npub19znrep7u2jrsfvqs5aa3s352l4ppfnxyun8pt28yulnkd7k9x08q9spj90Seen on
wss://relay.ditto.pubPublished at
2025-11-23 15:39:27 UTCEvent JSON
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