STMicro finally released a security advisory related to a silicon errata I found last year so I can talk more freely about it https://www.st.com/resource/en/security_bulletin/sb0070-risaf-limitation-about-pcie-region-protection-on-stm32mp25xx-stmicroelectronics.pdf
Tl;dr the STM32MP2 AXI firewall (RISAF) does not fully block transactions to the PCIe region that are prohibited by register settings.
Writes have the data replaced with 0x00, but still execute (so an attacker who should not be able to touch the device can write zeroes to any location in the BAR of their choice).
Reads have the response data replaced with 0x00 as seen on the bus, but any side effects of the read like clearing flags or popping a fifo will still execute.
In short, it seems to behave as though the AXI data channel is blocked but not the control channel.
The security violation interrupt still fires so the trustzone monitor will be aware of the issue, but depending on the application it may be too late since the register write already happened.
I found this by accident while trying to bring up the STM32MP2 bare metal and couldn't understand why all of my PCIe accesses were acting funny. So if anyone is wondering why I went dark all of a sudden on that side project, now you know why.
Andrew Zonenberg
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2026-05-21 17:37:28 UTC
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"content": "STMicro finally released a security advisory related to a silicon errata I found last year so I can talk more freely about it https://www.st.com/resource/en/security_bulletin/sb0070-risaf-limitation-about-pcie-region-protection-on-stm32mp25xx-stmicroelectronics.pdf\n\nTl;dr the STM32MP2 AXI firewall (RISAF) does not fully block transactions to the PCIe region that are prohibited by register settings.\n\nWrites have the data replaced with 0x00, but still execute (so an attacker who should not be able to touch the device can write zeroes to any location in the BAR of their choice).\n\nReads have the response data replaced with 0x00 as seen on the bus, but any side effects of the read like clearing flags or popping a fifo will still execute.\n\nIn short, it seems to behave as though the AXI data channel is blocked but not the control channel.\n\nThe security violation interrupt still fires so the trustzone monitor will be aware of the issue, but depending on the application it may be too late since the register write already happened.\n\nI found this by accident while trying to bring up the STM32MP2 bare metal and couldn't understand why all of my PCIe accesses were acting funny. So if anyone is wondering why I went dark all of a sudden on that side project, now you know why.",
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