Alex on Nostr: right - for Arm you can always have a stronger memory model than the architecture ...

right - for Arm you can always have a stronger memory model than the architecture requires. But we don't know that with the silicon feature alone the TSO mode meets the x86 memory model strength which is what I thought people wanted it for. Reading the thread back there looked like support for a global kernel config (so KVM doesn't need to mess with IMPDEF regs) but the likely result is well written aarch64 code running slower than it otherwise would.